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Device Process Courses: EE410 and EE312

EE410 was a CMOS IC Fabrication lab course until winter 2015 quarter. For winter 2016, the class was changed from CMOS to Depletion mode NMOS fabrication. In winter 2017 quarter, the class was renumbered as EE312.  Though not really a "baseline" process for the lab, the process/mask set routinely produces functional devices that researchers use as a starting point for their own devices.  The Run Sheets and Final Reports are provided here for reference.

EE312/410 Documents

Description
2019 EE312 NMOS Process Report- Runsheet and Device Characterization

This report summarizes the typical results obtained with the EE410 LOCOS maskset as outlined in the 2019 EE312 Runsheets. Herein, we report on the wafer-scale uniformity of device parameters, including performance and materials properties.

2016-2017 NMOS-Depletion Mode Process for EE410- Final Report

This is the Runsheet used for EE312 Winters 2016, 2017. The flow has no field oxide and a metal gate.

2016-2017 EE410/EE312 NMOS Process Flow without isolation

This is the run sheet for the depletion NMOS process set up by Lisa Rozario. This process is a modification of the EE410/EE312 depletion NMOS process utilized in winter 2016 EE410 and winter 2017 EE312 and uses the mask set "Depletion NMOS_SNF410"

2016-2017 EE410/EE312 Depletion NMOS Report

This is the final report for the depletion NMOS process set up by Lisa Rozario. This process is a modification of the EE410/EE312 depletion NMOS process utilized in winter 2016 EE410 and winter 2017 EE312 and uses the mask set "Depletion NMOS_SNF410"

2016 EE410 CV Measurement report

This report discusses the CV measurement result done in SNF measurement Lab Micromanipulator station using the CV sweep algorithm (which controls the Agilent 4275A LCR Meter). A known good sample of oxide (130 Ang) capacitor fabricated elsewhere was used to calibrate the measurement setup prior to measuring the EE410 Sample. Results from both measurements are presented in this report. 

2015 EE410-LOCOS CMOS Run Sheet

This is the process runsheet used for the 2015 CMOS run of the EE410 class.

2007-2008 EE410 CMOS Flow

Be aware: this is the Process manual for EE410, 2007-8.  The process has been completely redesigned.

Last modified: 28 Apr 2022